Generate separate stores for partially swizzled memory stores
Full vector and fully specified vector swizzle stores are not affected by this change, only partial swizzles ie swizzles with fewer components than the vector being stored to. Previously the vector being stored to loaded and any components not specified in the swizzle were used to create a full store to the vector. While this change generates more SPIR-V instructions, it is necessary for correctness. Fixes #2518.
This commit is contained in:
Jeremy Hayes
parent
9158061398
commit
6d5b40f051
50 changed files with 31343 additions and 26594 deletions
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@ -1,12 +1,12 @@
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spv.intOps.vert
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// Module Version 10000
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// Generated by (magic number): 8000a
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// Id's are bound by 268
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// Id's are bound by 302
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Capability Shader
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1: ExtInstImport "GLSL.std.450"
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MemoryModel Logical GLSL450
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EntryPoint Vertex 4 "main" 9 15 21 26 47 67 83 100 121 142 146 156 173 182 247
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EntryPoint Vertex 4 "main" 9 15 21 26 53 72 88 105 137 156 160 172 189 202 281
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Source ESSL 310
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Name 4 "main"
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Name 9 "iout"
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@ -15,44 +15,44 @@ spv.intOps.vert
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Name 26 "u2"
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Name 30 "u2out"
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Name 31 "ResType"
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Name 47 "u1"
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Name 51 "u1out"
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Name 52 "ResType"
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Name 67 "u4"
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Name 71 "u4outHi"
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Name 72 "u4outLow"
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Name 73 "ResType"
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Name 83 "i4"
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Name 87 "i4outHi"
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Name 88 "i4outLow"
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Name 89 "ResType"
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Name 100 "v3"
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Name 104 "i3out"
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Name 105 "ResType"
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Name 121 "v1"
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Name 124 "i1out"
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Name 125 "ResType"
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Name 142 "v2"
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Name 146 "i2"
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Name 156 "i1"
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Name 173 "u3"
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Name 182 "i3"
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Name 247 "v4"
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Name 53 "u1"
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Name 57 "u1out"
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Name 58 "ResType"
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Name 72 "u4"
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Name 76 "u4outHi"
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Name 77 "u4outLow"
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Name 78 "ResType"
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Name 88 "i4"
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Name 92 "i4outHi"
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Name 93 "i4outLow"
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Name 94 "ResType"
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Name 105 "v3"
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Name 109 "i3out"
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Name 110 "ResType"
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Name 137 "v1"
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Name 140 "i1out"
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Name 141 "ResType"
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Name 156 "v2"
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Name 160 "i2"
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Name 172 "i1"
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Name 189 "u3"
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Name 202 "i3"
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Name 281 "v4"
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Decorate 9(iout) Location 1
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Decorate 15(uout) Location 0
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Decorate 21(fout) Location 2
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Decorate 26(u2) Location 1
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Decorate 47(u1) Location 0
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Decorate 67(u4) Location 3
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Decorate 83(i4) Location 11
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Decorate 100(v3) Location 6
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Decorate 121(v1) Location 4
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Decorate 142(v2) Location 5
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Decorate 146(i2) Location 9
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Decorate 156(i1) Location 8
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Decorate 173(u3) Location 2
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Decorate 182(i3) Location 10
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Decorate 247(v4) Location 7
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Decorate 53(u1) Location 0
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Decorate 72(u4) Location 3
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Decorate 88(i4) Location 11
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Decorate 105(v3) Location 6
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Decorate 137(v1) Location 4
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Decorate 156(v2) Location 5
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Decorate 160(i2) Location 9
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Decorate 172(i1) Location 8
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Decorate 189(u3) Location 2
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Decorate 202(i3) Location 10
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Decorate 281(v4) Location 7
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2: TypeVoid
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3: TypeFunction 2
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6: TypeInt 32 1
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@ -78,58 +78,60 @@ spv.intOps.vert
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26(u2): 25(ptr) Variable Input
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29: TypePointer Function 24(ivec2)
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31(ResType): TypeStruct 24(ivec2) 24(ivec2)
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46: TypePointer Input 12(int)
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47(u1): 46(ptr) Variable Input
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50: TypePointer Function 12(int)
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52(ResType): TypeStruct 12(int) 12(int)
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56: TypePointer Output 12(int)
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66: TypePointer Input 13(ivec4)
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67(u4): 66(ptr) Variable Input
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70: TypePointer Function 13(ivec4)
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73(ResType): TypeStruct 13(ivec4) 13(ivec4)
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82: TypePointer Input 7(ivec4)
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83(i4): 82(ptr) Variable Input
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86: TypePointer Function 7(ivec4)
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89(ResType): TypeStruct 7(ivec4) 7(ivec4)
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98: TypeVector 18(float) 3
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99: TypePointer Input 98(fvec3)
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100(v3): 99(ptr) Variable Input
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102: TypeVector 6(int) 3
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103: TypePointer Function 102(ivec3)
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105(ResType): TypeStruct 98(fvec3) 102(ivec3)
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120: TypePointer Input 18(float)
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121(v1): 120(ptr) Variable Input
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123: TypePointer Function 6(int)
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125(ResType): TypeStruct 18(float) 6(int)
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129: TypePointer Output 18(float)
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135: TypePointer Output 6(int)
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140: TypeVector 18(float) 2
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141: TypePointer Input 140(fvec2)
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142(v2): 141(ptr) Variable Input
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144: TypeVector 6(int) 2
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145: TypePointer Input 144(ivec2)
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146(i2): 145(ptr) Variable Input
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155: TypePointer Input 6(int)
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156(i1): 155(ptr) Variable Input
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164: 6(int) Constant 4
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165: 6(int) Constant 5
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171: TypeVector 12(int) 3
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172: TypePointer Input 171(ivec3)
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173(u3): 172(ptr) Variable Input
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181: TypePointer Input 102(ivec3)
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182(i3): 181(ptr) Variable Input
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246: TypePointer Input 19(fvec4)
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247(v4): 246(ptr) Variable Input
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38: TypePointer Output 12(int)
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41: 12(int) Constant 1
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52: TypePointer Input 12(int)
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53(u1): 52(ptr) Variable Input
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56: TypePointer Function 12(int)
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58(ResType): TypeStruct 12(int) 12(int)
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71: TypePointer Input 13(ivec4)
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72(u4): 71(ptr) Variable Input
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75: TypePointer Function 13(ivec4)
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78(ResType): TypeStruct 13(ivec4) 13(ivec4)
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87: TypePointer Input 7(ivec4)
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88(i4): 87(ptr) Variable Input
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91: TypePointer Function 7(ivec4)
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94(ResType): TypeStruct 7(ivec4) 7(ivec4)
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103: TypeVector 18(float) 3
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104: TypePointer Input 103(fvec3)
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105(v3): 104(ptr) Variable Input
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107: TypeVector 6(int) 3
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108: TypePointer Function 107(ivec3)
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110(ResType): TypeStruct 103(fvec3) 107(ivec3)
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117: TypePointer Output 18(float)
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122: 12(int) Constant 2
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129: TypePointer Output 6(int)
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136: TypePointer Input 18(float)
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137(v1): 136(ptr) Variable Input
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139: TypePointer Function 6(int)
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141(ResType): TypeStruct 18(float) 6(int)
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154: TypeVector 18(float) 2
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155: TypePointer Input 154(fvec2)
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156(v2): 155(ptr) Variable Input
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158: TypeVector 6(int) 2
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159: TypePointer Input 158(ivec2)
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160(i2): 159(ptr) Variable Input
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171: TypePointer Input 6(int)
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172(i1): 171(ptr) Variable Input
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180: 6(int) Constant 4
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181: 6(int) Constant 5
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187: TypeVector 12(int) 3
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188: TypePointer Input 187(ivec3)
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189(u3): 188(ptr) Variable Input
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201: TypePointer Input 107(ivec3)
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202(i3): 201(ptr) Variable Input
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280: TypePointer Input 19(fvec4)
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281(v4): 280(ptr) Variable Input
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4(main): 2 Function None 3
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5: Label
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30(u2out): 29(ptr) Variable Function
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51(u1out): 50(ptr) Variable Function
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71(u4outHi): 70(ptr) Variable Function
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72(u4outLow): 70(ptr) Variable Function
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87(i4outHi): 86(ptr) Variable Function
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88(i4outLow): 86(ptr) Variable Function
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104(i3out): 103(ptr) Variable Function
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124(i1out): 123(ptr) Variable Function
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57(u1out): 56(ptr) Variable Function
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76(u4outHi): 75(ptr) Variable Function
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77(u4outLow): 75(ptr) Variable Function
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92(i4outHi): 91(ptr) Variable Function
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93(i4outLow): 91(ptr) Variable Function
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109(i3out): 108(ptr) Variable Function
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140(i1out): 139(ptr) Variable Function
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Store 9(iout) 11
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Store 15(uout) 17
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Store 21(fout) 23
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@ -142,221 +144,269 @@ spv.intOps.vert
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35: 13(ivec4) Load 15(uout)
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36: 24(ivec2) VectorShuffle 35 35 0 1
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37: 24(ivec2) IAdd 36 34
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38: 13(ivec4) Load 15(uout)
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39: 13(ivec4) VectorShuffle 38 37 4 5 2 3
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Store 15(uout) 39
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40: 24(ivec2) Load 30(u2out)
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41: 13(ivec4) Load 15(uout)
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42: 24(ivec2) VectorShuffle 41 41 0 1
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43: 24(ivec2) IAdd 42 40
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44: 13(ivec4) Load 15(uout)
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45: 13(ivec4) VectorShuffle 44 43 4 5 2 3
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Store 15(uout) 45
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48: 12(int) Load 47(u1)
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49: 12(int) Load 47(u1)
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53: 52(ResType) ISubBorrow 48 49
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54: 12(int) CompositeExtract 53 1
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Store 51(u1out) 54
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55: 12(int) CompositeExtract 53 0
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57: 56(ptr) AccessChain 15(uout) 16
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58: 12(int) Load 57
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59: 12(int) IAdd 58 55
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60: 56(ptr) AccessChain 15(uout) 16
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Store 60 59
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61: 12(int) Load 51(u1out)
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62: 56(ptr) AccessChain 15(uout) 16
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39: 38(ptr) AccessChain 15(uout) 16
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40: 12(int) CompositeExtract 37 0
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Store 39 40
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42: 38(ptr) AccessChain 15(uout) 41
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43: 12(int) CompositeExtract 37 1
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Store 42 43
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44: 24(ivec2) Load 30(u2out)
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45: 13(ivec4) Load 15(uout)
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46: 24(ivec2) VectorShuffle 45 45 0 1
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47: 24(ivec2) IAdd 46 44
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48: 38(ptr) AccessChain 15(uout) 16
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49: 12(int) CompositeExtract 47 0
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Store 48 49
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50: 38(ptr) AccessChain 15(uout) 41
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51: 12(int) CompositeExtract 47 1
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Store 50 51
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54: 12(int) Load 53(u1)
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55: 12(int) Load 53(u1)
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59: 58(ResType) ISubBorrow 54 55
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60: 12(int) CompositeExtract 59 1
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Store 57(u1out) 60
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61: 12(int) CompositeExtract 59 0
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62: 38(ptr) AccessChain 15(uout) 16
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63: 12(int) Load 62
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64: 12(int) IAdd 63 61
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65: 56(ptr) AccessChain 15(uout) 16
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65: 38(ptr) AccessChain 15(uout) 16
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Store 65 64
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68: 13(ivec4) Load 67(u4)
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69: 13(ivec4) Load 67(u4)
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74: 73(ResType) UMulExtended 68 69
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75: 13(ivec4) CompositeExtract 74 0
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Store 72(u4outLow) 75
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76: 13(ivec4) CompositeExtract 74 1
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Store 71(u4outHi) 76
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77: 13(ivec4) Load 71(u4outHi)
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78: 13(ivec4) Load 72(u4outLow)
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79: 13(ivec4) IAdd 77 78
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80: 13(ivec4) Load 15(uout)
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81: 13(ivec4) IAdd 80 79
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Store 15(uout) 81
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84: 7(ivec4) Load 83(i4)
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85: 7(ivec4) Load 83(i4)
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90: 89(ResType) SMulExtended 84 85
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91: 7(ivec4) CompositeExtract 90 0
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Store 88(i4outLow) 91
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92: 7(ivec4) CompositeExtract 90 1
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Store 87(i4outHi) 92
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93: 7(ivec4) Load 88(i4outLow)
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94: 7(ivec4) Load 87(i4outHi)
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95: 7(ivec4) IAdd 93 94
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96: 7(ivec4) Load 9(iout)
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97: 7(ivec4) IAdd 96 95
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Store 9(iout) 97
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101: 98(fvec3) Load 100(v3)
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106:105(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 101
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107: 102(ivec3) CompositeExtract 106 1
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Store 104(i3out) 107
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108: 98(fvec3) CompositeExtract 106 0
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109: 19(fvec4) Load 21(fout)
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110: 98(fvec3) VectorShuffle 109 109 0 1 2
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111: 98(fvec3) FAdd 110 108
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112: 19(fvec4) Load 21(fout)
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113: 19(fvec4) VectorShuffle 112 111 4 5 6 3
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Store 21(fout) 113
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114: 102(ivec3) Load 104(i3out)
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115: 7(ivec4) Load 9(iout)
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116: 102(ivec3) VectorShuffle 115 115 0 1 2
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117: 102(ivec3) IAdd 116 114
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118: 7(ivec4) Load 9(iout)
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119: 7(ivec4) VectorShuffle 118 117 4 5 6 3
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Store 9(iout) 119
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122: 18(float) Load 121(v1)
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126:125(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 122
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127: 6(int) CompositeExtract 126 1
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Store 124(i1out) 127
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128: 18(float) CompositeExtract 126 0
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130: 129(ptr) AccessChain 21(fout) 16
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131: 18(float) Load 130
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132: 18(float) FAdd 131 128
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133: 129(ptr) AccessChain 21(fout) 16
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Store 133 132
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134: 6(int) Load 124(i1out)
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136: 135(ptr) AccessChain 9(iout) 16
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137: 6(int) Load 136
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138: 6(int) IAdd 137 134
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139: 135(ptr) AccessChain 9(iout) 16
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Store 139 138
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143: 140(fvec2) Load 142(v2)
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147: 144(ivec2) Load 146(i2)
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148: 140(fvec2) ExtInst 1(GLSL.std.450) 53(Ldexp) 143 147
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149: 19(fvec4) Load 21(fout)
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150: 140(fvec2) VectorShuffle 149 149 0 1
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151: 140(fvec2) FAdd 150 148
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152: 19(fvec4) Load 21(fout)
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153: 19(fvec4) VectorShuffle 152 151 4 5 2 3
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Store 21(fout) 153
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154: 18(float) Load 121(v1)
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157: 6(int) Load 156(i1)
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158: 18(float) ExtInst 1(GLSL.std.450) 53(Ldexp) 154 157
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159: 129(ptr) AccessChain 21(fout) 16
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160: 18(float) Load 159
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161: 18(float) FAdd 160 158
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162: 129(ptr) AccessChain 21(fout) 16
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Store 162 161
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163: 6(int) Load 156(i1)
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166: 6(int) BitFieldSExtract 163 164 165
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167: 135(ptr) AccessChain 9(iout) 16
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168: 6(int) Load 167
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169: 6(int) IAdd 168 166
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170: 135(ptr) AccessChain 9(iout) 16
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Store 170 169
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174: 171(ivec3) Load 173(u3)
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175: 171(ivec3) BitFieldUExtract 174 164 165
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176: 13(ivec4) Load 15(uout)
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177: 171(ivec3) VectorShuffle 176 176 0 1 2
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178: 171(ivec3) IAdd 177 175
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179: 13(ivec4) Load 15(uout)
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180: 13(ivec4) VectorShuffle 179 178 4 5 6 3
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Store 15(uout) 180
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183: 102(ivec3) Load 182(i3)
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184: 102(ivec3) Load 182(i3)
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185: 102(ivec3) BitFieldInsert 183 184 164 165
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186: 7(ivec4) Load 9(iout)
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187: 102(ivec3) VectorShuffle 186 186 0 1 2
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188: 102(ivec3) IAdd 187 185
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189: 7(ivec4) Load 9(iout)
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190: 7(ivec4) VectorShuffle 189 188 4 5 6 3
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Store 9(iout) 190
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191: 12(int) Load 47(u1)
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192: 12(int) Load 47(u1)
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193: 12(int) BitFieldInsert 191 192 164 165
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194: 56(ptr) AccessChain 15(uout) 16
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195: 12(int) Load 194
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196: 12(int) IAdd 195 193
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197: 56(ptr) AccessChain 15(uout) 16
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Store 197 196
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198: 144(ivec2) Load 146(i2)
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199: 144(ivec2) BitReverse 198
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200: 7(ivec4) Load 9(iout)
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201: 144(ivec2) VectorShuffle 200 200 0 1
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202: 144(ivec2) IAdd 201 199
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203: 7(ivec4) Load 9(iout)
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204: 7(ivec4) VectorShuffle 203 202 4 5 2 3
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Store 9(iout) 204
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205: 13(ivec4) Load 67(u4)
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206: 13(ivec4) BitReverse 205
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207: 13(ivec4) Load 15(uout)
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208: 13(ivec4) IAdd 207 206
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Store 15(uout) 208
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209: 6(int) Load 156(i1)
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210: 6(int) BitCount 209
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211: 135(ptr) AccessChain 9(iout) 16
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212: 6(int) Load 211
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213: 6(int) IAdd 212 210
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214: 135(ptr) AccessChain 9(iout) 16
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Store 214 213
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215: 171(ivec3) Load 173(u3)
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216: 102(ivec3) BitCount 215
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217: 7(ivec4) Load 9(iout)
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218: 102(ivec3) VectorShuffle 217 217 0 1 2
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219: 102(ivec3) IAdd 218 216
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220: 7(ivec4) Load 9(iout)
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221: 7(ivec4) VectorShuffle 220 219 4 5 6 3
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Store 9(iout) 221
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222: 144(ivec2) Load 146(i2)
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223: 144(ivec2) ExtInst 1(GLSL.std.450) 73(FindILsb) 222
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66: 12(int) Load 57(u1out)
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67: 38(ptr) AccessChain 15(uout) 16
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68: 12(int) Load 67
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69: 12(int) IAdd 68 66
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70: 38(ptr) AccessChain 15(uout) 16
|
||||
Store 70 69
|
||||
73: 13(ivec4) Load 72(u4)
|
||||
74: 13(ivec4) Load 72(u4)
|
||||
79: 78(ResType) UMulExtended 73 74
|
||||
80: 13(ivec4) CompositeExtract 79 0
|
||||
Store 77(u4outLow) 80
|
||||
81: 13(ivec4) CompositeExtract 79 1
|
||||
Store 76(u4outHi) 81
|
||||
82: 13(ivec4) Load 76(u4outHi)
|
||||
83: 13(ivec4) Load 77(u4outLow)
|
||||
84: 13(ivec4) IAdd 82 83
|
||||
85: 13(ivec4) Load 15(uout)
|
||||
86: 13(ivec4) IAdd 85 84
|
||||
Store 15(uout) 86
|
||||
89: 7(ivec4) Load 88(i4)
|
||||
90: 7(ivec4) Load 88(i4)
|
||||
95: 94(ResType) SMulExtended 89 90
|
||||
96: 7(ivec4) CompositeExtract 95 0
|
||||
Store 93(i4outLow) 96
|
||||
97: 7(ivec4) CompositeExtract 95 1
|
||||
Store 92(i4outHi) 97
|
||||
98: 7(ivec4) Load 93(i4outLow)
|
||||
99: 7(ivec4) Load 92(i4outHi)
|
||||
100: 7(ivec4) IAdd 98 99
|
||||
101: 7(ivec4) Load 9(iout)
|
||||
102: 7(ivec4) IAdd 101 100
|
||||
Store 9(iout) 102
|
||||
106: 103(fvec3) Load 105(v3)
|
||||
111:110(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 106
|
||||
112: 107(ivec3) CompositeExtract 111 1
|
||||
Store 109(i3out) 112
|
||||
113: 103(fvec3) CompositeExtract 111 0
|
||||
114: 19(fvec4) Load 21(fout)
|
||||
115: 103(fvec3) VectorShuffle 114 114 0 1 2
|
||||
116: 103(fvec3) FAdd 115 113
|
||||
118: 117(ptr) AccessChain 21(fout) 16
|
||||
119: 18(float) CompositeExtract 116 0
|
||||
Store 118 119
|
||||
120: 117(ptr) AccessChain 21(fout) 41
|
||||
121: 18(float) CompositeExtract 116 1
|
||||
Store 120 121
|
||||
123: 117(ptr) AccessChain 21(fout) 122
|
||||
124: 18(float) CompositeExtract 116 2
|
||||
Store 123 124
|
||||
125: 107(ivec3) Load 109(i3out)
|
||||
126: 7(ivec4) Load 9(iout)
|
||||
127: 107(ivec3) VectorShuffle 126 126 0 1 2
|
||||
128: 107(ivec3) IAdd 127 125
|
||||
130: 129(ptr) AccessChain 9(iout) 16
|
||||
131: 6(int) CompositeExtract 128 0
|
||||
Store 130 131
|
||||
132: 129(ptr) AccessChain 9(iout) 41
|
||||
133: 6(int) CompositeExtract 128 1
|
||||
Store 132 133
|
||||
134: 129(ptr) AccessChain 9(iout) 122
|
||||
135: 6(int) CompositeExtract 128 2
|
||||
Store 134 135
|
||||
138: 18(float) Load 137(v1)
|
||||
142:141(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 138
|
||||
143: 6(int) CompositeExtract 142 1
|
||||
Store 140(i1out) 143
|
||||
144: 18(float) CompositeExtract 142 0
|
||||
145: 117(ptr) AccessChain 21(fout) 16
|
||||
146: 18(float) Load 145
|
||||
147: 18(float) FAdd 146 144
|
||||
148: 117(ptr) AccessChain 21(fout) 16
|
||||
Store 148 147
|
||||
149: 6(int) Load 140(i1out)
|
||||
150: 129(ptr) AccessChain 9(iout) 16
|
||||
151: 6(int) Load 150
|
||||
152: 6(int) IAdd 151 149
|
||||
153: 129(ptr) AccessChain 9(iout) 16
|
||||
Store 153 152
|
||||
157: 154(fvec2) Load 156(v2)
|
||||
161: 158(ivec2) Load 160(i2)
|
||||
162: 154(fvec2) ExtInst 1(GLSL.std.450) 53(Ldexp) 157 161
|
||||
163: 19(fvec4) Load 21(fout)
|
||||
164: 154(fvec2) VectorShuffle 163 163 0 1
|
||||
165: 154(fvec2) FAdd 164 162
|
||||
166: 117(ptr) AccessChain 21(fout) 16
|
||||
167: 18(float) CompositeExtract 165 0
|
||||
Store 166 167
|
||||
168: 117(ptr) AccessChain 21(fout) 41
|
||||
169: 18(float) CompositeExtract 165 1
|
||||
Store 168 169
|
||||
170: 18(float) Load 137(v1)
|
||||
173: 6(int) Load 172(i1)
|
||||
174: 18(float) ExtInst 1(GLSL.std.450) 53(Ldexp) 170 173
|
||||
175: 117(ptr) AccessChain 21(fout) 16
|
||||
176: 18(float) Load 175
|
||||
177: 18(float) FAdd 176 174
|
||||
178: 117(ptr) AccessChain 21(fout) 16
|
||||
Store 178 177
|
||||
179: 6(int) Load 172(i1)
|
||||
182: 6(int) BitFieldSExtract 179 180 181
|
||||
183: 129(ptr) AccessChain 9(iout) 16
|
||||
184: 6(int) Load 183
|
||||
185: 6(int) IAdd 184 182
|
||||
186: 129(ptr) AccessChain 9(iout) 16
|
||||
Store 186 185
|
||||
190: 187(ivec3) Load 189(u3)
|
||||
191: 187(ivec3) BitFieldUExtract 190 180 181
|
||||
192: 13(ivec4) Load 15(uout)
|
||||
193: 187(ivec3) VectorShuffle 192 192 0 1 2
|
||||
194: 187(ivec3) IAdd 193 191
|
||||
195: 38(ptr) AccessChain 15(uout) 16
|
||||
196: 12(int) CompositeExtract 194 0
|
||||
Store 195 196
|
||||
197: 38(ptr) AccessChain 15(uout) 41
|
||||
198: 12(int) CompositeExtract 194 1
|
||||
Store 197 198
|
||||
199: 38(ptr) AccessChain 15(uout) 122
|
||||
200: 12(int) CompositeExtract 194 2
|
||||
Store 199 200
|
||||
203: 107(ivec3) Load 202(i3)
|
||||
204: 107(ivec3) Load 202(i3)
|
||||
205: 107(ivec3) BitFieldInsert 203 204 180 181
|
||||
206: 7(ivec4) Load 9(iout)
|
||||
207: 107(ivec3) VectorShuffle 206 206 0 1 2
|
||||
208: 107(ivec3) IAdd 207 205
|
||||
209: 129(ptr) AccessChain 9(iout) 16
|
||||
210: 6(int) CompositeExtract 208 0
|
||||
Store 209 210
|
||||
211: 129(ptr) AccessChain 9(iout) 41
|
||||
212: 6(int) CompositeExtract 208 1
|
||||
Store 211 212
|
||||
213: 129(ptr) AccessChain 9(iout) 122
|
||||
214: 6(int) CompositeExtract 208 2
|
||||
Store 213 214
|
||||
215: 12(int) Load 53(u1)
|
||||
216: 12(int) Load 53(u1)
|
||||
217: 12(int) BitFieldInsert 215 216 180 181
|
||||
218: 38(ptr) AccessChain 15(uout) 16
|
||||
219: 12(int) Load 218
|
||||
220: 12(int) IAdd 219 217
|
||||
221: 38(ptr) AccessChain 15(uout) 16
|
||||
Store 221 220
|
||||
222: 158(ivec2) Load 160(i2)
|
||||
223: 158(ivec2) BitReverse 222
|
||||
224: 7(ivec4) Load 9(iout)
|
||||
225: 144(ivec2) VectorShuffle 224 224 0 1
|
||||
226: 144(ivec2) IAdd 225 223
|
||||
227: 7(ivec4) Load 9(iout)
|
||||
228: 7(ivec4) VectorShuffle 227 226 4 5 2 3
|
||||
Store 9(iout) 228
|
||||
229: 13(ivec4) Load 67(u4)
|
||||
230: 7(ivec4) ExtInst 1(GLSL.std.450) 73(FindILsb) 229
|
||||
231: 7(ivec4) Load 9(iout)
|
||||
232: 7(ivec4) IAdd 231 230
|
||||
Store 9(iout) 232
|
||||
233: 6(int) Load 156(i1)
|
||||
234: 6(int) ExtInst 1(GLSL.std.450) 74(FindSMsb) 233
|
||||
235: 135(ptr) AccessChain 9(iout) 16
|
||||
236: 6(int) Load 235
|
||||
237: 6(int) IAdd 236 234
|
||||
238: 135(ptr) AccessChain 9(iout) 16
|
||||
Store 238 237
|
||||
239: 24(ivec2) Load 26(u2)
|
||||
240: 144(ivec2) ExtInst 1(GLSL.std.450) 75(FindUMsb) 239
|
||||
241: 7(ivec4) Load 9(iout)
|
||||
242: 144(ivec2) VectorShuffle 241 241 0 1
|
||||
243: 144(ivec2) IAdd 242 240
|
||||
244: 7(ivec4) Load 9(iout)
|
||||
245: 7(ivec4) VectorShuffle 244 243 4 5 2 3
|
||||
Store 9(iout) 245
|
||||
248: 19(fvec4) Load 247(v4)
|
||||
249: 12(int) ExtInst 1(GLSL.std.450) 55(PackUnorm4x8) 248
|
||||
250: 56(ptr) AccessChain 15(uout) 16
|
||||
251: 12(int) Load 250
|
||||
252: 12(int) IAdd 251 249
|
||||
253: 56(ptr) AccessChain 15(uout) 16
|
||||
Store 253 252
|
||||
254: 19(fvec4) Load 247(v4)
|
||||
255: 12(int) ExtInst 1(GLSL.std.450) 54(PackSnorm4x8) 254
|
||||
256: 56(ptr) AccessChain 15(uout) 16
|
||||
257: 12(int) Load 256
|
||||
258: 12(int) IAdd 257 255
|
||||
259: 56(ptr) AccessChain 15(uout) 16
|
||||
Store 259 258
|
||||
260: 12(int) Load 47(u1)
|
||||
261: 19(fvec4) ExtInst 1(GLSL.std.450) 64(UnpackUnorm4x8) 260
|
||||
262: 19(fvec4) Load 21(fout)
|
||||
263: 19(fvec4) FAdd 262 261
|
||||
Store 21(fout) 263
|
||||
264: 12(int) Load 47(u1)
|
||||
265: 19(fvec4) ExtInst 1(GLSL.std.450) 63(UnpackSnorm4x8) 264
|
||||
266: 19(fvec4) Load 21(fout)
|
||||
267: 19(fvec4) FAdd 266 265
|
||||
Store 21(fout) 267
|
||||
225: 158(ivec2) VectorShuffle 224 224 0 1
|
||||
226: 158(ivec2) IAdd 225 223
|
||||
227: 129(ptr) AccessChain 9(iout) 16
|
||||
228: 6(int) CompositeExtract 226 0
|
||||
Store 227 228
|
||||
229: 129(ptr) AccessChain 9(iout) 41
|
||||
230: 6(int) CompositeExtract 226 1
|
||||
Store 229 230
|
||||
231: 13(ivec4) Load 72(u4)
|
||||
232: 13(ivec4) BitReverse 231
|
||||
233: 13(ivec4) Load 15(uout)
|
||||
234: 13(ivec4) IAdd 233 232
|
||||
Store 15(uout) 234
|
||||
235: 6(int) Load 172(i1)
|
||||
236: 6(int) BitCount 235
|
||||
237: 129(ptr) AccessChain 9(iout) 16
|
||||
238: 6(int) Load 237
|
||||
239: 6(int) IAdd 238 236
|
||||
240: 129(ptr) AccessChain 9(iout) 16
|
||||
Store 240 239
|
||||
241: 187(ivec3) Load 189(u3)
|
||||
242: 107(ivec3) BitCount 241
|
||||
243: 7(ivec4) Load 9(iout)
|
||||
244: 107(ivec3) VectorShuffle 243 243 0 1 2
|
||||
245: 107(ivec3) IAdd 244 242
|
||||
246: 129(ptr) AccessChain 9(iout) 16
|
||||
247: 6(int) CompositeExtract 245 0
|
||||
Store 246 247
|
||||
248: 129(ptr) AccessChain 9(iout) 41
|
||||
249: 6(int) CompositeExtract 245 1
|
||||
Store 248 249
|
||||
250: 129(ptr) AccessChain 9(iout) 122
|
||||
251: 6(int) CompositeExtract 245 2
|
||||
Store 250 251
|
||||
252: 158(ivec2) Load 160(i2)
|
||||
253: 158(ivec2) ExtInst 1(GLSL.std.450) 73(FindILsb) 252
|
||||
254: 7(ivec4) Load 9(iout)
|
||||
255: 158(ivec2) VectorShuffle 254 254 0 1
|
||||
256: 158(ivec2) IAdd 255 253
|
||||
257: 129(ptr) AccessChain 9(iout) 16
|
||||
258: 6(int) CompositeExtract 256 0
|
||||
Store 257 258
|
||||
259: 129(ptr) AccessChain 9(iout) 41
|
||||
260: 6(int) CompositeExtract 256 1
|
||||
Store 259 260
|
||||
261: 13(ivec4) Load 72(u4)
|
||||
262: 7(ivec4) ExtInst 1(GLSL.std.450) 73(FindILsb) 261
|
||||
263: 7(ivec4) Load 9(iout)
|
||||
264: 7(ivec4) IAdd 263 262
|
||||
Store 9(iout) 264
|
||||
265: 6(int) Load 172(i1)
|
||||
266: 6(int) ExtInst 1(GLSL.std.450) 74(FindSMsb) 265
|
||||
267: 129(ptr) AccessChain 9(iout) 16
|
||||
268: 6(int) Load 267
|
||||
269: 6(int) IAdd 268 266
|
||||
270: 129(ptr) AccessChain 9(iout) 16
|
||||
Store 270 269
|
||||
271: 24(ivec2) Load 26(u2)
|
||||
272: 158(ivec2) ExtInst 1(GLSL.std.450) 75(FindUMsb) 271
|
||||
273: 7(ivec4) Load 9(iout)
|
||||
274: 158(ivec2) VectorShuffle 273 273 0 1
|
||||
275: 158(ivec2) IAdd 274 272
|
||||
276: 129(ptr) AccessChain 9(iout) 16
|
||||
277: 6(int) CompositeExtract 275 0
|
||||
Store 276 277
|
||||
278: 129(ptr) AccessChain 9(iout) 41
|
||||
279: 6(int) CompositeExtract 275 1
|
||||
Store 278 279
|
||||
282: 19(fvec4) Load 281(v4)
|
||||
283: 12(int) ExtInst 1(GLSL.std.450) 55(PackUnorm4x8) 282
|
||||
284: 38(ptr) AccessChain 15(uout) 16
|
||||
285: 12(int) Load 284
|
||||
286: 12(int) IAdd 285 283
|
||||
287: 38(ptr) AccessChain 15(uout) 16
|
||||
Store 287 286
|
||||
288: 19(fvec4) Load 281(v4)
|
||||
289: 12(int) ExtInst 1(GLSL.std.450) 54(PackSnorm4x8) 288
|
||||
290: 38(ptr) AccessChain 15(uout) 16
|
||||
291: 12(int) Load 290
|
||||
292: 12(int) IAdd 291 289
|
||||
293: 38(ptr) AccessChain 15(uout) 16
|
||||
Store 293 292
|
||||
294: 12(int) Load 53(u1)
|
||||
295: 19(fvec4) ExtInst 1(GLSL.std.450) 64(UnpackUnorm4x8) 294
|
||||
296: 19(fvec4) Load 21(fout)
|
||||
297: 19(fvec4) FAdd 296 295
|
||||
Store 21(fout) 297
|
||||
298: 12(int) Load 53(u1)
|
||||
299: 19(fvec4) ExtInst 1(GLSL.std.450) 63(UnpackSnorm4x8) 298
|
||||
300: 19(fvec4) Load 21(fout)
|
||||
301: 19(fvec4) FAdd 300 299
|
||||
Store 21(fout) 301
|
||||
Return
|
||||
FunctionEnd
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue