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Add test cases for redundant type conversions

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These redundant type conversions were generating illegal SPIR-V when
only the 8-bit/16-bit storage extensions and not the corresponding
arithmetic extensions were enabled.
This commit is contained in:
Arcady Goldmints-Orlov 2024-06-20 17:13:09 -04:00 • committed by arcady-lunarg
parent a05c4eca74
commit 2d8b71fc63
10 changed files with 120 additions and 5 deletions
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22
Test/baseResults/spv.16bitstorage.frag.out
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@ -1,9 +1,10 @@
spv.16bitstorage.frag
// Module Version 10000
// Generated by (magic number): 8000b
// Id's are bound by 173
// Id's are bound by 189
Capability Shader
Capability Float16
Capability StorageUniformBufferBlock16
Capability StorageUniform16
Extension "SPV_KHR_16bit_storage"
@ -337,5 +338,24 @@ spv.16bitstorage.frag
171:6(float16_t) FConvert 170
172: 28(ptr) AccessChain 19(b2) 21
Store 172 171
173: 28(ptr) AccessChain 27(b1) 21
174:6(float16_t) Load 173
175: 28(ptr) AccessChain 19(b2) 21
Store 175 174
176: 43(ptr) AccessChain 27(b1) 32
177: 7(f16vec2) Load 176
178:6(float16_t) CompositeExtract 177 0
179:6(float16_t) CompositeExtract 177 1
180: 7(f16vec2) CompositeConstruct 178 179
181: 43(ptr) AccessChain 19(b2) 32
Store 181 180
182: 34(ptr) AccessChain 27(b1) 33
183: 8(f16vec3) Load 182
184:6(float16_t) CompositeExtract 183 0
185:6(float16_t) CompositeExtract 183 1
186:6(float16_t) CompositeExtract 183 2
187: 8(f16vec3) CompositeConstruct 184 185 186
188: 34(ptr) AccessChain 19(b2) 33
Store 188 187
Return
FunctionEnd