Add test cases for redundant type conversions
These redundant type conversions were generating illegal SPIR-V when only the 8-bit/16-bit storage extensions and not the corresponding arithmetic extensions were enabled.
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10 changed files with 120 additions and 5 deletions
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@ -1,9 +1,10 @@
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spv.16bitstorage-int.frag
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// Module Version 10000
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// Generated by (magic number): 8000b
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// Id's are bound by 171
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// Id's are bound by 187
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Capability Shader
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Capability Int16
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Capability StorageUniformBufferBlock16
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Capability StorageUniform16
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Extension "SPV_KHR_16bit_storage"
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@ -335,5 +336,24 @@ spv.16bitstorage-int.frag
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169: 6(int16_t) SConvert 58
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170: 28(ptr) AccessChain 19(b2) 21
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Store 170 169
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171: 28(ptr) AccessChain 27(b1) 21
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172: 6(int16_t) Load 171
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173: 28(ptr) AccessChain 19(b2) 21
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Store 173 172
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174: 42(ptr) AccessChain 27(b1) 32
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175: 7(i16vec2) Load 174
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176: 6(int16_t) CompositeExtract 175 0
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177: 6(int16_t) CompositeExtract 175 1
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178: 7(i16vec2) CompositeConstruct 176 177
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179: 42(ptr) AccessChain 19(b2) 32
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Store 179 178
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180: 34(ptr) AccessChain 27(b1) 33
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181: 8(i16vec3) Load 180
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182: 6(int16_t) CompositeExtract 181 0
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183: 6(int16_t) CompositeExtract 181 1
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184: 6(int16_t) CompositeExtract 181 2
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185: 8(i16vec3) CompositeConstruct 182 183 184
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186: 34(ptr) AccessChain 19(b2) 33
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Store 186 185
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Return
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FunctionEnd
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