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Merge pull request #2977 from AMD-dwang/AMD_shader_early_and_late_fragment_tests

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Add SPV_AMD_shader_early_and_late_fragment_tests
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Greg Fischer 2022-07-27 11:23:16 -06:00 • committed by GitHub
commit 22d39cd684
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GPG key ID: 4AEE18F83AFDEB23
14 changed files with 207 additions and 22 deletions
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1
SPIRV/GLSL.ext.KHR.h
View file

@ -53,5 +53,6 @@ static const char* const E_SPV_KHR_terminate_invocation = "SPV_KHR_termi
static const char* const E_SPV_KHR_workgroup_memory_explicit_layout = "SPV_KHR_workgroup_memory_explicit_layout";
static const char* const E_SPV_KHR_subgroup_uniform_control_flow = "SPV_KHR_subgroup_uniform_control_flow";
static const char* const E_SPV_KHR_fragment_shader_barycentric = "SPV_KHR_fragment_shader_barycentric";
static const char* const E_SPV_AMD_shader_early_and_late_fragment_tests = "SPV_AMD_shader_early_and_late_fragment_tests";
#endif // #ifndef GLSLextKHR_H

23
SPIRV/GlslangToSpv.cpp
View file

@ -1623,6 +1623,12 @@ TGlslangToSpvTraverser::TGlslangToSpvTraverser(unsigned int spvVersion,
if (glslangIntermediate->getEarlyFragmentTests())
builder.addExecutionMode(shaderEntry, spv::ExecutionModeEarlyFragmentTests);
if (glslangIntermediate->getEarlyAndLateFragmentTestsAMD())
{
builder.addExecutionMode(shaderEntry, spv::ExecutionModeEarlyAndLateFragmentTestsAMD);
builder.addExtension(spv::E_SPV_AMD_shader_early_and_late_fragment_tests);
}
if (glslangIntermediate->getPostDepthCoverage()) {
builder.addCapability(spv::CapabilitySampleMaskPostDepthCoverage);
builder.addExecutionMode(shaderEntry, spv::ExecutionModePostDepthCoverage);
@ -1632,6 +1638,9 @@ TGlslangToSpvTraverser::TGlslangToSpvTraverser(unsigned int spvVersion,
if (glslangIntermediate->isDepthReplacing())
builder.addExecutionMode(shaderEntry, spv::ExecutionModeDepthReplacing);
if (glslangIntermediate->isStencilReplacing())
builder.addExecutionMode(shaderEntry, spv::ExecutionModeStencilRefReplacingEXT);
#ifndef GLSLANG_WEB
switch(glslangIntermediate->getDepth()) {
@ -1640,6 +1649,20 @@ TGlslangToSpvTraverser::TGlslangToSpvTraverser(unsigned int spvVersion,
case glslang::EldUnchanged: mode = spv::ExecutionModeDepthUnchanged; break;
default: mode = spv::ExecutionModeMax; break;
}
if (mode != spv::ExecutionModeMax)
builder.addExecutionMode(shaderEntry, (spv::ExecutionMode)mode);
switch (glslangIntermediate->getStencil()) {
case glslang::ElsRefUnchangedFrontAMD: mode = spv::ExecutionModeStencilRefUnchangedFrontAMD; break;
case glslang::ElsRefGreaterFrontAMD: mode = spv::ExecutionModeStencilRefGreaterFrontAMD; break;
case glslang::ElsRefLessFrontAMD: mode = spv::ExecutionModeStencilRefLessFrontAMD; break;
case glslang::ElsRefUnchangedBackAMD: mode = spv::ExecutionModeStencilRefUnchangedBackAMD; break;
case glslang::ElsRefGreaterBackAMD: mode = spv::ExecutionModeStencilRefGreaterBackAMD; break;
case glslang::ElsRefLessBackAMD: mode = spv::ExecutionModeStencilRefLessBackAMD; break;
default: mode = spv::ExecutionModeMax; break;
}
if (mode != spv::ExecutionModeMax)
builder.addExecutionMode(shaderEntry, (spv::ExecutionMode)mode);
switch (glslangIntermediate->getInterlockOrdering()) {

42
SPIRV/doc.cpp
View file

@ -173,28 +173,32 @@ const char* ExecutionModeString(int mode)
case 31: return "ContractionOff";
case 32: return "Bad";
case ExecutionModeInitializer: return "Initializer";
case ExecutionModeFinalizer: return "Finalizer";
case ExecutionModeSubgroupSize: return "SubgroupSize";
case ExecutionModeSubgroupsPerWorkgroup: return "SubgroupsPerWorkgroup";
case ExecutionModeSubgroupsPerWorkgroupId: return "SubgroupsPerWorkgroupId";
case ExecutionModeLocalSizeId: return "LocalSizeId";
case ExecutionModeLocalSizeHintId: return "LocalSizeHintId";
case ExecutionModeInitializer: return "Initializer";
case ExecutionModeFinalizer: return "Finalizer";
case ExecutionModeSubgroupSize: return "SubgroupSize";
case ExecutionModeSubgroupsPerWorkgroup: return "SubgroupsPerWorkgroup";
case ExecutionModeSubgroupsPerWorkgroupId: return "SubgroupsPerWorkgroupId";
case ExecutionModeLocalSizeId: return "LocalSizeId";
case ExecutionModeLocalSizeHintId: return "LocalSizeHintId";
case ExecutionModePostDepthCoverage: return "PostDepthCoverage";
case ExecutionModeDenormPreserve: return "DenormPreserve";
case ExecutionModeDenormFlushToZero: return "DenormFlushToZero";
case ExecutionModeSignedZeroInfNanPreserve: return "SignedZeroInfNanPreserve";
case ExecutionModeRoundingModeRTE: return "RoundingModeRTE";
case ExecutionModeRoundingModeRTZ: return "RoundingModeRTZ";
case ExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT";
case ExecutionModePostDepthCoverage: return "PostDepthCoverage";
case ExecutionModeDenormPreserve: return "DenormPreserve";
case ExecutionModeDenormFlushToZero: return "DenormFlushToZero";
case ExecutionModeSignedZeroInfNanPreserve: return "SignedZeroInfNanPreserve";
case ExecutionModeRoundingModeRTE: return "RoundingModeRTE";
case ExecutionModeRoundingModeRTZ: return "RoundingModeRTZ";
case ExecutionModeEarlyAndLateFragmentTestsAMD: return "EarlyAndLateFragmentTestsAMD";
case ExecutionModeStencilRefUnchangedFrontAMD: return "StencilRefUnchangedFrontAMD";
case ExecutionModeStencilRefLessFrontAMD: return "StencilRefLessFrontAMD";
case ExecutionModeStencilRefGreaterBackAMD: return "StencilRefGreaterBackAMD";
case ExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT";
case ExecutionModeSubgroupUniformControlFlowKHR: return "SubgroupUniformControlFlow";
case ExecutionModeOutputLinesNV: return "OutputLinesNV";
case ExecutionModeOutputPrimitivesNV: return "OutputPrimitivesNV";
case ExecutionModeOutputTrianglesNV: return "OutputTrianglesNV";
case ExecutionModeDerivativeGroupQuadsNV: return "DerivativeGroupQuadsNV";
case ExecutionModeDerivativeGroupLinearNV: return "DerivativeGroupLinearNV";
case ExecutionModeOutputLinesNV: return "OutputLinesNV";
case ExecutionModeOutputPrimitivesNV: return "OutputPrimitivesNV";
case ExecutionModeOutputTrianglesNV: return "OutputTrianglesNV";
case ExecutionModeDerivativeGroupQuadsNV: return "DerivativeGroupQuadsNV";
case ExecutionModeDerivativeGroupLinearNV: return "DerivativeGroupLinearNV";
case ExecutionModePixelInterlockOrderedEXT: return "PixelInterlockOrderedEXT";
case ExecutionModePixelInterlockUnorderedEXT: return "PixelInterlockUnorderedEXT";

7
SPIRV/spirv.hpp
View file

@ -158,7 +158,14 @@ enum ExecutionMode {
ExecutionModeSignedZeroInfNanPreserve = 4461,
ExecutionModeRoundingModeRTE = 4462,
ExecutionModeRoundingModeRTZ = 4463,
ExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
ExecutionModeStencilRefReplacingEXT = 5027,
ExecutionModeStencilRefUnchangedFrontAMD = 5079,
ExecutionModeStencilRefGreaterFrontAMD = 5080,
ExecutionModeStencilRefLessFrontAMD = 5081,
ExecutionModeStencilRefUnchangedBackAMD = 5082,
ExecutionModeStencilRefGreaterBackAMD = 5083,
ExecutionModeStencilRefLessBackAMD = 5084,
ExecutionModeOutputLinesNV = 5269,
ExecutionModeOutputPrimitivesNV = 5270,
ExecutionModeDerivativeGroupQuadsNV = 5289,